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Tue 20 Jun 2017 12:05 - 12:30 at Actes, Civil Engineering - Synthesis Chair(s): Sasa Misailovic

A memory consistency model specifies which writes to shared memory a given read may see. Ambiguities or errors in these specifications can lead to bugs in both compilers and applications. Yet architectures usually define their memory models with prose and litmus tests—small concurrent programs that demonstrate allowed and forbidden outcomes. Recent work has formalized the memory models of common architectures through substantial manual effort, but as new architectures emerge, there is a growing need for tools to aid these efforts.

This paper presents MemSynth, a synthesis-aided system for reasoning about axiomatic specifications of memory models. MemSynth takes as input a set of litmus tests and a framework sketch that defines a class of memory models. The sketch comprises a set of axioms with missing expressions (or holes). Given these inputs, MemSynth synthesizes a completion of the axioms—i.e., a memory model—that gives the desired outcome on all tests. The MemSynth engine employs a novel embedding of bounded relational logic in a solver-aided programming language, which enables it to tackle complex synthesis queries intractable to existing relational solvers. This design also enables it to solve new kinds of queries, such as checking if a set of litmus tests unambiguously defines a memory model within a framework sketch.

We show that MemSynth can synthesize specifications for x86 in under two seconds, and for PowerPC in 12 seconds from 768 litmus tests. Our ambiguity check identifies missing tests from both the Intel x86 documentation and the validation suite of a previous PowerPC formalization. We also used MemSynth to reproduce, debug, and automatically repair a paper on comparing memory models in just two days.

Tue 20 Jun

Displayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change

10:50 - 12:30
SynthesisPLDI Research Papers at Actes, Civil Engineering
Chair(s): Sasa Misailovic University of Illinois at Urbana-Champaign
10:50
25m
Talk
Component-based Synthesis of Table Consolidation and Transformation Tasks from Examples
PLDI Research Papers
Yu Feng University of Texas at Austin, USA, Ruben Martins , Jacob Van Geffen UT Austin, Işıl Dillig UT Austin, Swarat Chaudhuri Rice University
Media Attached
11:15
25m
Talk
Network Configuration Synthesis with Abstract Topologies
PLDI Research Papers
Ryan Beckett Princeton University, Ratul Mahajan Microsoft, Todd Millstein University of California, Los Angeles, Jitendra Padhye Microsoft, David Walker Princeton University
Media Attached
11:40
25m
Talk
Synthesizing Highly Expressive SQL Queries from Input-Output Examples
PLDI Research Papers
Chenglong Wang University of Washington, USA, Alvin Cheung University of Washington, Rastislav Bodík University of Washington
Media Attached
12:05
25m
Talk
Synthesizing Memory Models from Framework Sketches and Litmus Tests
PLDI Research Papers
James Bornholt University of Washington, Emina Torlak University of Washington, USA
Pre-print Media Attached