PLDI, ECOOP, Curry On, DEBS, LCTES and ISMM (series) / PLDI 2017 (series) / ARRAY 2017 (series) / ARRAY 2017 /
Efficient Array Slicing on the Intel Xeon Phi Coprocessor
Array slicing is an operation which selects a subset of elements from a source array and copies them into a destination array. In this article we present an algorithm for generating code for a subset of Fortran slicing expressions, targeting the Intel Xeon Phi coprocessor. The resulting code outperforms the code produced by Intel’s Fortran compiler by 2.40X on average for a set of slicing expressions, and by 2.23X and 1.13X on average for two slicing expressions relevant for border exchange code.
| Slides (slicing_presentation_array_2017.pptx) | 1.76MiB |
Sun 18 JunDisplayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change
Sun 18 Jun
Displayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change
16:00 - 17:30 | |||
16:00 30mTalk | Efficient Array Slicing on the Intel Xeon Phi Coprocessor ARRAY Benjamin Andreassen Norwegian University of Science and Technology, Jan Christian Norwegian University of Science and Technology, Lasse Natvig Norwegian University of Science and Technology DOI File Attached | ||
16:30 30mTalk | Modular Array-based GPU Computing in a Dynamically-typed Language ARRAY Matthias Springer Tokyo Institute of Technology, Peter Wauligmann Tokyo Institute of Technology, Hidehiko Masuhara Tokyo Institute of Technology DOI File Attached | ||
17:00 30mTalk | HPTT: A High-Performance Tensor Transposition C++ Library ARRAY DOI File Attached | ||